? semiconductor components industries, llc, 2014 july, 2014 ? rev. 6 1 publication order number: ntd3055?150/d ntd3055-150, nvd3055-150 power mosfet 9.0 a, 60 v, n?channel dpak/ipak designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. features ? nvd prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? these devices are pb?free and are rohs compliant typical applications ? power supplies ? converters ? power motor controls ? bridge circuits maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain?to?source v oltage v dss 60 vdc drain?to?gate voltage (r gs = 10 m ) v dgr 60 vdc gate?to?source v oltage ? continuous ? non?repetitive (t p 10 ms) v gs v gs 20 30 vdc drain current ? continuous @ t a = 25 c ? continuous @ t a = 100 c ? single pulse (t p 10 s) i d i d i dm 9.0 3.0 27 adc apk total power dissipation @ t a = 25 c derate above 25 c total power dissipation @ t a = 25 c (note 1) total power dissipation @ t a = 25 c (note 2) p d 28.8 0.19 2.1 1.5 w w/ c w w operating and storage temperature range t j , t stg ?55 to 175 c single pulse drain?to?source avalanche energy ? starting t j = 25 c (v dd = 25 vdc, v gs = 10 vdc, l = 1.0 mh, i l (pk) = 7.75 a, v ds = 60 vdc) e as 30 mj thermal resistance ? junction?to?case ? junction?to?ambient (note 1) ? junction?to?ambient (note 2) r jc r ja r ja 5.2 71.4 100 c/w maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. when surface mounted to an fr4 board using 0.5 sq in pad size. 2. when surface mounted to an fr4 board using minimum recommended pad size. * the assembly location code (a) is front side optional. in cases where the assembly location is stamped in the package, the front side assembly code may be blank. 9.0 amperes, 60 volts r ds(on) = 122 m (typ) n?channel d s g 1 gate 3 source 2 drain 4 drain dpak case 369c (surface mount) style 2 marking diagrams & pin assignments 1 2 3 4 1 gate 3 source 2 drain 4 drain ipak case 369d (straight lead) style 2 1 2 3 4 see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information ayww 3150g ayww 3150g a = assembly location* 3150 = device code y = year ww = work week g = pb?free package http://onsemi.com
ntd3055?150, nvd3055?150 http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain?to?source breakdown voltage (note 3) (v gs = 0 vdc, i d = 250 adc) temperature coefficient (positive) v (br)dss 60 ? ? 70.2 ? ? vdc mv/ c zero gate voltage drain current (v ds = 60 vdc, v gs = 0 vdc) (v ds = 60 vdc, v gs = 0 vdc, t j = 150 c) i dss ? ? ? ? 1.0 10 adc gate?body leakage current (v gs = 20 vdc, v ds = 0 vdc) i gss ? ? 100 nadc on characteristics (note 3) gate threshold voltage (note 3) (v ds = v gs , i d = 250 adc) threshold temperature coefficient (negative) v gs(th) 2.0 ? 3.0 6.4 4.0 ? vdc mv/ c static drain?to?source on?resistance (note 3) (v gs = 10 vdc, i d = 4.5 adc) r ds(on) ? 122 150 m static drain?to?source on?voltage (note 3) (v gs = 10 vdc, i d = 9.0 adc) (v gs = 10 vdc, i d = 4.5 adc, t j = 150 c) v ds(on) ? ? 1.4 1.1 1.9 ? vdc forward transconductance (note 3) (v ds = 7.0 vdc, i d = 6.0 adc) g fs ? 5.4 ? mhos dynamic characteristics input capacitance (v ds = 25 vdc, v gs = 0 vdc, f = 1.0 mhz) c iss ? 200 280 pf output capacitance c oss ? 70 100 transfer capacitance c rss ? 26 40 switching characteristics (note 4) turn?on delay time (v dd = 48 vdc, i d = 9.0 adc, v gs = 10 vdc, r g = 9.1 ) (note 3) t d(on) ? 11.2 25 ns rise time t r ? 37.1 80 turn?off delay time t d(off) ? 12.2 25 fall time t f ? 23 50 gate charge (v ds = 48 vdc, i d = 9.0 adc, v gs = 10 vdc) (note 3) q t ? 7.1 15 nc q 1 ? 1.7 ? q 2 ? 3.5 ? source?drain diode characteristics forward on?voltage (i s = 9.0 adc, v gs = 0 vdc) (note 3) (i s = 19 adc, v gs = 0 vdc, t j = 150 c) v sd ? ? 0.98 0.86 1.20 ? vdc reverse recovery time (i s = 9.0 adc, v gs = 0 vdc, di s /dt = 100 a/ s) (note 3) t rr ? 28.9 ? ns t a ? 21.6 ? t b ? 7.3 ? reverse recovery stored charge q rr ? 0.036 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
ntd3055?150, nvd3055?150 http://onsemi.com 3 t j = ?55 c t j = 100 c 0.6 10 1 100 1000 12 8 16 4 0 20 0 12 23 1 i d , drain current (amps) 0 v gs , gate?to?source voltage (volts) figure 1. on?region characteristics figure 2. transfer characteristics i d , drain current (amps) 0 0.1 8 0 4121624 figure 3. on?resistance versus gate?to?source voltage i d , drain current (amps) figure 4. on?resistance versus drain current and gate voltage i d , drain current (amps) r ds(on) , drain?to?source resistance ( ) figure 5. on?resistance variation with temperature t j , junction temperature ( c) figure 6. drain?to?source leakage current versus voltage v ds , drain?to?source voltage (volts) i dss , leakage (na) 20 ?50 100 75 0 ?25 125 175 34 7 040 30 20 10 6 0 v ds , drain?to?source voltage (volts) 4 8 16 8 v gs = 0 v t j = 150 c t j = 100 c i d = 4.5 a v gs = 10 v v gs = 10 v v ds 10 v t j = 25 c v gs = 10 v r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance (normalized) v gs = 9 v v gs = 7 v 50 25 56 467 5 v gs = 8 v v gs = 6 v v gs = 5 v 9 8 20 0.2 0.3 0.4 0.5 t j = ?55 c t j = 100 c t j = 25 c 0 0.1 8 4121624 v gs = 15 v 20 0.2 0.3 0.4 0.5 t j = ?55 c t j = 100 c t j = 25 c 150 0.8 1 1.2 1.4 1.6 1.8 2 2.2 50 t j = 125 c 0
ntd3055?150, nvd3055?150 http://onsemi.com 4 v gs v ds 4 10 6 0 12 4 10 320 20 10 0 c, capacitance (pf) 0 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage versus total charge v gs , gate?to?source voltage (v) 1 100 10 10 100 figure 9. resistive switching time variation versus gate resistance r g , gate resistance ( ) figure 10. diode forward voltage versus current v sd , source?to?drain voltage (volts) i s , source current (amps) t, time (ns) 560 01 6 0.6 0.92 0.84 0.76 0.68 1 6 2 0 8 10 gate?to?source or drain?to?source voltage (v) 160 240 400 25 2 i d = 9 a t j = 25 c q 2 q 1 v gs q t v ds = 30 v i d = 9 a v gs = 10 v t r t d(off) t d(on) t f v gs = 0 v t j = 25 c v gs = 0 v v ds = 0 v t j = 25 c c rss c iss c oss c rss c iss 2345 80 480 15 5 5 78 8 16 0.1 100 10 100 figure 11. maximum rated forward biased safe operating area v ds , drain?to?source voltage (volts) figure 12. maximum avalanche energy versus starting junction temperature t j , starting junction temperature ( c) e as , single pulse drain?to?source avalanche energy (mj) i d , drain current (amps) 25 125 100 75 50 24 8 0 32 v gs = 20 v single pulse t c = 25 c i d = 7.75 a 17 5 150 1 10 1 0.1 r ds(on) limit thermal limit package limit 10 ms 10 s 1 ms dc 100 s
ntd3055?150, nvd3055?150 http://onsemi.com 5 p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 figure 13. thermal response t, time (s) 10 1 0.00001 0.001 0.01 0.1 1 0 0.0001 1 0.1 r(t), normalized effective transient thermal resistance d = 0.5 0.2 0.1 single pulse 0.05 0.01 ordering information device package shipping ? ntd3055?150g dpak (pb?free) 75 units / rail ntd3055?150?1g ipak (pb?free) 75 units / rail ntd3055?150t4g dpak (pb?free) 2500 / tape & reel ntd3055?150t4h dpak (halide?free) 2500 / tape & reel nvd3055?150t4g* dpak (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *nvd prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable.
ntd3055?150, nvd3055?150 http://onsemi.com 6 package dimensions dpak (single gauge) case 369c issue e b d e b3 l3 l4 b2 m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.028 0.045 0.72 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 7. optional mold feature. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.114 ref 2.90 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw e bottom view z bottom view side view top view alternate construction note 7 style 2: pin 1. gate 2. drain 3. source 4. drain
ntd3055?150, nvd3055?150 http://onsemi.com 7 package dimensions 123 4 v s a k ?t? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d issue c style 2: pin 1. gate 2. drain 3. source 4. drain on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemni fy and hold scillc and its officers, em ployees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ntd3055?150/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
|
